1. Field of the Invention
The present invention relates to a pipeline type processor for processing asynchronous transfer mode (ATM) cells, and more particularly relates to a pipeline type processor that determines necessary processing condition for each processor constituting the pipeline type processor and provides the determined condition to each processor in advance of its individual processing in order to cope with the ATM cell processing which is different from each other depending upon cell conditions such as the type of cell and the contents of the cell.
2. Description of the Related Art
A pipeline type processor is used in a technical field in which a large volume of data such as picture image data is to be processed in a high speed. A plurality of processors are provided in the pipeline type processor, and each processor performs a partial processing dedicated to each processor. Data input into the pipeline type processor is partially processed by each of a plurality of processors one by one like a production line, and output from the pipeline type processor as completely processed data.
An example of a system in which all processors in a pipeline type processor can partially process input data in the same processing time is disclosed in Japanese published unexamined patent application No. Hei 1-295335, titled A Load Distribution System.
As shown in FIG. 8, the load distribution system disclosed in the above patent application is composed of partial processing 81 to 8n divided so that processing can be processed in the same time and processors 91 to 9n for processing data. The above load distribution system is composed so that the partial processing 81 in the processor 91 of precedently input data is finished when the processor 91 receives input data and starts the execution of the partial processing 81. The residual processors 92 to 9n and partial processing 82 to 8n are also similarly composed.
However, in the above prior art, there is a defect that if the processing of an input cell is different depending upon a condition such as the type and the contents of the cell, processing is redundant. The reason is that if a series of processing of an input cell is divided into partial processing, processing for determining a condition is required in each partial processing.
The object of the present invention is to avoid the need to determine a condition by each processor during processing, even if the processing of an input cell is different, depending upon a condition such as the type and the contents of the cell and to increase the quantity of processing that each processor can process within a fixed time during pipeline processing composed of n pieces of partial processing in which processing is finished within predetermined time, for example within one cell time.
The present invention made to solve the above problem is based upon a Pipeline type processor for asynchronous transfer mode (ATM) cells provided with input buffers for storing n pieces of asynchronous transmission mode (ATM) cells, n pairs of a processor and a buffer for processing the above each cell according to pipeline processing and an address determining section for determining a condition of pipeline processing. The above address determining section determines a processing instruction code starting address of each cell based upon the information of each cell stored in the input buffer, and the processors sequentially execute pipeline processing based upon the each processing instruction code starting address.
That is, in the present invention, in pipeline processing y n pieces of processors in which processing is finished within a predetermined time, for example within one cell time of an ATM cell, if the processing of a input cell is different depending upon a condition such as the type and the contents of the cell, a condition is determined before pipeline processing and the contents of processing composed of n pieces of steps by the processor are determined beforehand.